/*
 * Default Flash planning for Application MCU.
 *
 * Zephyr build for nRF5340 with ARM TrustZone-M support, implies building
 * Secure and Non-Secure Zephyr images.
 *
 * Secure image will be placed, by default, in flash0 (or in slot0, if MCUboot
 * is present). Secure image will use sram0 for system memory.
 *
 * Non-Secure image will be placed in slot0_ns, and use sram0_ns for system
 * memory.
 *
 * Note that the Secure image only requires knowledge of the beginning of the
 * Non-Secure image (not its size).
 */
&flash0 {
	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 DT_SIZE_K(64)>;
		};

		slot0_partition: partition@10000 {
			label = "image-0";
			reg = <0x00010000 DT_SIZE_K(256)>;
		};

		slot0_ns_partition: partition@50000 {
			label = "image-0-nonsecure";
			reg = <0x00050000 DT_SIZE_K(192)>;
		};

		slot1_partition: partition@80000 {
			label = "image-1";
			reg = <0x00080000 DT_SIZE_K(256)>;
		};

		slot1_ns_partition: partition@c0000 {
			label = "image-1-nonsecure";
			reg = <0x000c0000 DT_SIZE_K(192)>;
		};

		/* 0xf0000 to 0xf7fff reserved for TF-M partitions */
		storage_partition: partition@f8000 {
			label = "storage";
			reg = <0x000f8000 DT_SIZE_K(32)>;
		};
	};
};

/* Default SRAM planning when building for nRF5340 with ARM TrustZone-M support
 * - Lowest 256 kB SRAM allocated to Secure image (sram0_s)
 * - Middle 192 kB allocated to Non-Secure image (sram0_ns)
 * - Upper 64 kB SRAM allocated as Shared memory (sram0_shared)
 *   (see {board}_shared_sram.dtsi)
 */
/ {
	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/* Zephyr image(s) memory */
		sram0_image: image@20000000 {
			reg = <0x20000000 DT_SIZE_K(448)>;
		};

		/* Secure image memory */
		sram0_s: image_s@20000000 {
			reg = <0x20000000 DT_SIZE_K(256)>;
		};

		/* Non-Secure image memory */
		sram0_ns: image_ns@20040000 {
			reg = <0x20040000 DT_SIZE_K(192)>;
		};
	};
};
